1. Field
Exemplary embodiments of the present invention relate to a resistance element generator and an output driver using the same.
2. Description of the Related Art
Currently, a large number of data transmission systems require a new interface technology. In order to meet this need, low voltage differential signaling (LVDS), reduced swing differential signaling (RSDS), and scalable low voltage signaling (SLVS) have emerged as new interface technologies for transmitting data at high speeds. Such new interface technologies have high bit rates, low power consumption, and improved noise characteristics.
When transmitting and receiving data between chips, it is important to match output impedance and transmission line impedance.
When the above-described SLVS is used as one of the Interface technologies, accurate output impedance is required because SLVS is a voltage-based method. Thus, the output impedance needs to be corrected.
Conventional output impedance correction methods include forming a resistor inside the chip or mounting a resistor outside of the chip.
Mounting a resistor outside the chip requires mounting a surface mount device (SMD)-type resistor on the outside of the chip. However, this method has a disadvantage in that an element is added on the printed circuit board (PCB). Thus, the fabrication costs and utilized circuit area are increased.
In contrast, for forming a resistor in a chip, a passive element is used.
FIG. 1 is a diagram illustrating a conventional SLVS output driver. FIG. 1 shows a method for correcting impedance based on a digital code. In forming a resistor within the chip, an external controller provides a control signal for correcting impedance by using the digital code. The conventional SLVS output driver includes a plurality of resistance forming units (referred to as legs). Each of the resistance forming units (i.e., leg) 10 includes a resistor (i.e., a passive element) R and an N-channel metal oxide silicon field effect transistor (MOSFET) NM that serves as a switch. In FIG. 1, ‘INP<N:1>’ denotes a first impedance correction code, and ‘INN<N:1>’ denotes a second impedance correction code. The digital code includes the first impedance correction code and the second impedance correction code. Furthermore, ‘Vtx’ denotes a driving voltage source for an output driver, and ‘OUTP’ and ‘OUTN’ denote differential output terminals.
The resistor R in the chip may have a large deviation in its resistance depending on its fabrication process. Thus, after the deviation is measured during a wafer test, trimming must be performed. The trimming increases the cost and requires a fuse or one-time programmable (OTP) memory, which increases the utilized circuit area.